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Re: [edk2] sending data to drive on IDE Fail

Subject: Re: [edk2] sending data to drive on IDE Fail

From: "Tian, Feng" <feng.tian@intel.com>

To: "jooyoung.nam@samsung.com" <jooyoung.nam@samsung.com>, "edk2-devel@lists.sourceforge.net" <edk2-devel@lists.sourceforge.net>

Date: 2012-06-05 17:33:41

Hi, Joo

Thanks for your snapshot to show the link layer state machine.

But its too lower layer for me.

As you said you are writing data to a rewritable media in ATAPI device, I want to know: what did you see when you invoked AtaPacketReadWrite() to write data?

Where will the function be jumped out with an error status? Is the first byte of data to be written? Or after 512 bytes data has been sent?

Thanks

Feng

 

From: [mailto:jooyoung.nam@samsung.com]
Sent: Tuesday, June 05, 2012 16:21
To: Tian, Feng; edk2-devel@lists.sourceforge.net
Subject: Re: RE: [edk2] sending data to drive on IDE Fail

 

Hi Feng
It happens at specific Platform and I dump Device information blow.
When I issues atapi command with data in , it works well.
But sends command  data out , it does not work.


When I analyze with sata analyzer, Host does not issue X_RDY.



[Dump Handle ]
Handle C8 (020BB298)
   Dpath (256F898)
      ACPI Device Path for Acpi
       HID PNP0A03, UID 0
      Hardware Device Path for PCI
       Function (0) Device (11)
      AsStr: 'PciRoot(0x0)/Pci(0x11,0x0)'
   PciIo (2573A98)
     Segment #.....: 00
     Bus #.........: 00
     Device #......: 11
     Function #....: 00
     ROM Size......: 0
     ROM Location..: 00000000
     Vendor ID.....: 1022
     Device ID.....: 7800
     Class Code....: 8F 01 01
     Configuration Header :
       2210007807013002408F010100200000
       91F1000081F1000071F1000061F10000
       51F100000000F5FE000000003C10CF2A
       0000000070000000000000000A010000

   1FD29BE6-70D0-42A4-A6E7-E5D10E6AC376 (00000000)
   AD77AE29-4C20-4FDD-8504-8176619B676A (00000000)
   E159A956-3299-4EE9-9176-65181A4E5E9F (025C3598)
   A1E37052-80D9-4E65-A317-3E9A55C43EC9 (025C5020)
   2ACB6627-DF02-4E23-B4F9-6A93FA6E9DA6 (025C5018)




[ Device table ]
C  T   D
T  Y C I
R  P F A
L  E G G #P #D #C Device Name
== = = = == == == =============================================================
2D R - -  -  1 29 PciRoot(0x0)
4D R - -  -  1  1<UNKNOWN>
B6 D - -  4  -  -<UNKNOWN>
BE D - -  1  -  - PciRoot(0x0)/Pci(0x0,0x0)
C2 B - -  1  1  1 PciRoot(0x0)/Pci(0x1,0x0)
C3 D - -  1  -  - PciRoot(0x0)/Pci(0x1,0x1)
C4 D - -  1  -  - PciRoot(0x0)/Pci(0x2,0x0)
C5 D - -  1  -  - PciRoot(0x0)/Pci(0x4,0x0)
C6 D - -  1  -  - PciRoot(0x0)/Pci(0x5,0x0)
C7 D - -  1  -  - PciRoot(0x0)/Pci(0x5,0x0)/Pci(0x0,0x0)
C8 B - -  1  2  2 AMD SB700 SATA Controller
C9 B - -  1  2  2 USB Host Controller
CA D - -  1  2  - USB Host Controller
CB D - -  1  2  - USB Host Controller
CC B - -  1  2  1 USB Host Controller
CD D - -  1  1  - PciRoot(0x0)/Pci(0x14,0x0)
CE D - -  1  2  - AMD SB700 PATA Controller
CF D - -  1  -  - PciRoot(0x0)/Pci(0x14,0x2)
D0 B - -  1  1  1 PciRoot(0x0)/Pci(0x14,0x3)
D1 D - -  1  -  - PciRoot(0x0)/Pci(0x14,0x4)
D2 D - -  1  2  - USB Host Controller
D3 D - -  1  -  - PciRoot(0x0)/Pci(0x14,0x7)
D4 D - -  1  2  - USB Host Controller
D5 D - -  1  2  - USB Host Controller
D6 D - -  1  -  - PciRoot(0x0)/Pci(0x18,0x0)
D7 D - -  1  -  - PciRoot(0x0)/Pci(0x18,0x1)
D8 D - -  1  -  - PciRoot(0x0)/Pci(0x18,0x2)
D9 D - -  1  -  - PciRoot(0x0)/Pci(0x18,0x3)
DA D - -  1  -  - PciRoot(0x0)/Pci(0x18,0x4)
DB D - -  1  -  - PciRoot(0x0)/Pci(0x18,0x5)
DC D - -  1  -  - PciRoot(0x0)/Pci(0x18,0x6)
DD D - -  1  -  - PciRoot(0x0)/Pci(0x18,0x7)
DE B - -  1  2  1 PciRoot(0x0)/Pci(0x1,0x0)/AcpiAdr(0x80010100)
DF B - -  1  3  1 SanDisk U3 Cruzer Micro 2.18
E0 D - -  1  2  - FAT16 File System [979MB]
E1 B - -  1  2  1 USB Optical Mouse
E2 B - -  1  2  1 EP1 Interrupt
E5 D - -  1  1  - TSSTcorp CDDVDW TS-H653J               
E6 B - -  1  2  4 ST3500418AS                            
E7 D - -  1  2  - FAT32 File System [96MB]
E8 D - -  1  1  - PciRoot(0x0)/Pci(0x11,0x0)/Ata(Secondary,Master,0x0)/HD(2,GPT,a7158c82-0d2d-42a4-b070-0374880134af,0x32800,0x40000)
E9 D - -  1  1  - PciRoot(0x0)/Pci(0x11,0x0)/Ata(Secondary,Master,0x0)/HD(3,GPT,64aaa053-14f2-4f30-8966-8b3ce0643940,0x72800,0x38d00000)
EA D - -  1  1  - PciRoot(0x0)/Pci(0x11,0x0)/Ata(Secondary,Master,0x0)/HD(4,GPT,f9b8902f-09f6-4d37-b8e8-4dbea38b3ba8,0x38d72800,0x1613800)
EB D - -  1  -  - PciRoot(0x0)/Pci(0x14,0x3)/Acpi(PNP0c08,0x0)



------- Original Message -------
Sender : Tian, Feng<feng.tian@intel.com>
Date : 2012-06-05 16:18 (GMT+09:00)
Title : RE: [edk2] sending data to drive on IDE Fail

Hi, Joo

If the PCI class code is 01018Fh, it means the IDE controller supports native and legacy mode, and the primary and secondary channel now works at native mode.

Only from this info, it's hard to make judgment on what's the root cause.

Which chipset is it? What's the phenomenon of the error? Could you dump all value in the IDE controller PCI configuration space?

Thanks
Feng

-----Original Message-----
From: Jooyoung Nam [mailto:jooyoung.nam@samsung.com]
Sent: Tuesday, June 05, 2012 14:52
To: edk2-devel@lists.sourceforge.net
Subject: [edk2] sending data to drive on IDE Fail

Dear All,

I am struggling to send data to odd device on IDE Mode.
It works well except one mother board.

PCI Class Code is 01018Fh .
I wonder whether BusMasterBaseAddr is wong or not

EFI_STATUS
EFIAPI
GetIdeRegisterIoAddr (
  IN     EFI_PCI_IO_PROTOCOL         *PciIo,
  IN OUT EFI_IDE_REGISTERS           *IdeRegisters
  )
{
  EFI_STATUS        Status;
  PCI_TYPE00        PciData;
  UINT16            CommandBlockBaseAddr;
  UINT16            ControlBlockBaseAddr;
  UINT16            BusMasterBaseAddr;

  if ((PciIo == NULL) || (IdeRegisters == NULL)) {
    return EFI_INVALID_PARAMETER;
  }

  Status = PciIo->Pci.Read (
                        PciIo,
                        EfiPciIoWidthUint8,
                        0,
                        sizeof (PciData),
                        &PciData
                        );

  if (EFI_ERROR (Status)) {
    return Status;
  }
  BusMasterBaseAddr    = (UINT16) ((PciData.Device.Bar[4] & 0x0000fff0));

  if ((PciData.Hdr.ClassCode[0] & IDE_PRIMARY_OPERATING_MODE) == 0) {
    CommandBlockBaseAddr = 0x1f0;
    ControlBlockBaseAddr = 0x3f6;
  } else {
    //
    // The BARs should be of IO type
    //
    if ((PciData.Device.Bar[0] & BIT0) == 0 ||
        (PciData.Device.Bar[1] & BIT0) == 0) {
      return EFI_UNSUPPORTED;
    }

    CommandBlockBaseAddr = (UINT16) (PciData.Device.Bar[0] & 0x0000fff8);
    ControlBlockBaseAddr = (UINT16) ((PciData.Device.Bar[1] & 0x0000fffc) + 2);
  }

  //
  // Calculate IDE primary channel I/O register base address.
  //
  IdeRegisters[EfiIdePrimary].Data              = CommandBlockBaseAddr;
  IdeRegisters[EfiIdePrimary].ErrOrFeature      = (UINT16) (CommandBlockBaseAddr + 0x01);
  IdeRegisters[EfiIdePrimary].SectorCount       = (UINT16) (CommandBlockBaseAddr + 0x02);
  IdeRegisters[EfiIdePrimary].SectorNumber      = (UINT16) (CommandBlockBaseAddr + 0x03);
  IdeRegisters[EfiIdePrimary].CylinderLsb       = (UINT16) (CommandBlockBaseAddr + 0x04);
  IdeRegisters[EfiIdePrimary].CylinderMsb       = (UINT16) (CommandBlockBaseAddr + 0x05);
  IdeRegisters[EfiIdePrimary].Head              = (UINT16) (CommandBlockBaseAddr + 0x06);
  IdeRegisters[EfiIdePrimary].CmdOrStatus       = (UINT16) (CommandBlockBaseAddr + 0x07);
  IdeRegisters[EfiIdePrimary].AltOrDev          = ControlBlockBaseAddr;
  IdeRegisters[EfiIdePrimary].BusMasterBaseAddr = BusMasterBaseAddr;

  if ((PciData.Hdr.ClassCode[0] & IDE_SECONDARY_OPERATING_MODE) == 0) {
    CommandBlockBaseAddr = 0x170;
    ControlBlockBaseAddr = 0x376;
  } else {
    //
    // The BARs should be of IO type
    //
    if ((PciData.Device.Bar[2] & BIT0) == 0 ||
        (PciData.Device.Bar[3] & BIT0) == 0) {
      return EFI_UNSUPPORTED;
    }

    CommandBlockBaseAddr = (UINT16) (PciData.Device.Bar[2] & 0x0000fff8);
    ControlBlockBaseAddr = (UINT16) ((PciData.Device.Bar[3] & 0x0000fffc) + 2);
  }

  //
  // Calculate IDE secondary channel I/O register base address.
  //
  IdeRegisters[EfiIdeSecondary].Data              = CommandBlockBaseAddr;
  IdeRegisters[EfiIdeSecondary].ErrOrFeature      = (UINT16) (CommandBlockBaseAddr + 0x01);
  IdeRegisters[EfiIdeSecondary].SectorCount       = (UINT16) (CommandBlockBaseAddr + 0x02);
  IdeRegisters[EfiIdeSecondary].SectorNumber      = (UINT16) (CommandBlockBaseAddr + 0x03);
  IdeRegisters[EfiIdeSecondary].CylinderLsb       = (UINT16) (CommandBlockBaseAddr + 0x04);
  IdeRegisters[EfiIdeSecondary].CylinderMsb       = (UINT16) (CommandBlockBaseAddr + 0x05);
  IdeRegisters[EfiIdeSecondary].Head              = (UINT16) (CommandBlockBaseAddr + 0x06);
  IdeRegisters[EfiIdeSecondary].CmdOrStatus       = (UINT16) (CommandBlockBaseAddr + 0x07);
  IdeRegisters[EfiIdeSecondary].AltOrDev          = ControlBlockBaseAddr;
//  IdeRegisters[EfiIdeSecondary].BusMasterBaseAddr = (UINT16) (BusMasterBaseAddr + 0x8);
  IdeRegisters[EfiIdeSecondary].BusMasterBaseAddr = (UINT16) (BusMasterBaseAddr);

return EFI_SUCCESS;
}


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