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Defines

MdePkg/Include/IndustryStandard/SdramSpd.h File Reference

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Defines

#define SPD_MEMORY_TYPE   2
#define SPD_SDRAM_ROW_ADDR   3
#define SPD_SDRAM_COL_ADDR   4
#define SPD_SDRAM_MODULE_ROWS   5
#define SPD_SDRAM_MODULE_DATA_WIDTH_LSB   6
#define SPD_SDRAM_MODULE_DATA_WIDTH_MSB   7
#define SPD_SDRAM_ECC_SUPPORT   11
#define SPD_SDRAM_REFRESH   12
#define SPD_SDRAM_WIDTH   13
#define SPD_SDRAM_ERROR_WIDTH   14
#define SPD_SDRAM_BURST_LENGTH   16
#define SPD_SDRAM_NO_OF_BANKS   17
#define SPD_SDRAM_CAS_LATENCY   18
#define SPD_SDRAM_MODULE_ATTR   21
#define SPD_SDRAM_TCLK1_PULSE   9
 cycle time for highest cas latency
#define SPD_SDRAM_TAC1_PULSE   10
 access time for highest cas latency
#define SPD_SDRAM_TCLK2_PULSE   23
 cycle time for 2nd highest cas latency
#define SPD_SDRAM_TAC2_PULSE   24
 access time for 2nd highest cas latency
#define SPD_SDRAM_TCLK3_PULSE   25
 cycle time for 3rd highest cas latency
#define SPD_SDRAM_TAC3_PULSE   26
 access time for 3rd highest cas latency
#define SPD_SDRAM_MIN_PRECHARGE   27
#define SPD_SDRAM_ACTIVE_MIN   28
#define SPD_SDRAM_RAS_CAS   29
#define SPD_SDRAM_RAS_PULSE   30
#define SPD_SDRAM_DENSITY   31
#define SPD_VAL_SDR_TYPE   4
 SDR SDRAM memory.
#define SPD_VAL_DDR_TYPE   7
 DDR SDRAM memory.
#define SPD_VAL_DDR2_TYPE   8
 DDR2 SDRAM memory.
#define SPD_ECC_TYPE_NONE   0x00
 No error checking.
#define SPD_ECC_TYPE_PARITY   0x01
 No error checking.
#define SPD_ECC_TYPE_ECC   0x02
 Error checking only.
#define SPD_BUFFERED   0x01
#define SPD_REGISTERED   0x02

Detailed Description

This file contains definitions for the SPD fields on an SDRAM.

Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at http://opensource.org/licenses/bsd-license.php

THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

Definition in file SdramSpd.h.


Define Documentation

#define SPD_BUFFERED   0x01

Definition at line 62 of file SdramSpd.h.

#define SPD_ECC_TYPE_ECC   0x02

Error checking only.

Definition at line 58 of file SdramSpd.h.

#define SPD_ECC_TYPE_NONE   0x00

No error checking.

Definition at line 56 of file SdramSpd.h.

#define SPD_ECC_TYPE_PARITY   0x01

No error checking.

Definition at line 57 of file SdramSpd.h.

#define SPD_MEMORY_TYPE   2

Definition at line 20 of file SdramSpd.h.

#define SPD_REGISTERED   0x02

Definition at line 63 of file SdramSpd.h.

#define SPD_SDRAM_ACTIVE_MIN   28

Definition at line 42 of file SdramSpd.h.

#define SPD_SDRAM_BURST_LENGTH   16

Definition at line 30 of file SdramSpd.h.

#define SPD_SDRAM_CAS_LATENCY   18

Definition at line 32 of file SdramSpd.h.

#define SPD_SDRAM_COL_ADDR   4

Definition at line 22 of file SdramSpd.h.

#define SPD_SDRAM_DENSITY   31

Definition at line 45 of file SdramSpd.h.

#define SPD_SDRAM_ECC_SUPPORT   11

Definition at line 26 of file SdramSpd.h.

#define SPD_SDRAM_ERROR_WIDTH   14

Definition at line 29 of file SdramSpd.h.

#define SPD_SDRAM_MIN_PRECHARGE   27

Definition at line 41 of file SdramSpd.h.

#define SPD_SDRAM_MODULE_ATTR   21

Definition at line 33 of file SdramSpd.h.

#define SPD_SDRAM_MODULE_DATA_WIDTH_LSB   6

Definition at line 24 of file SdramSpd.h.

#define SPD_SDRAM_MODULE_DATA_WIDTH_MSB   7

Definition at line 25 of file SdramSpd.h.

#define SPD_SDRAM_MODULE_ROWS   5

Definition at line 23 of file SdramSpd.h.

#define SPD_SDRAM_NO_OF_BANKS   17

Definition at line 31 of file SdramSpd.h.

#define SPD_SDRAM_RAS_CAS   29

Definition at line 43 of file SdramSpd.h.

#define SPD_SDRAM_RAS_PULSE   30

Definition at line 44 of file SdramSpd.h.

#define SPD_SDRAM_REFRESH   12

Definition at line 27 of file SdramSpd.h.

#define SPD_SDRAM_ROW_ADDR   3

Definition at line 21 of file SdramSpd.h.

#define SPD_SDRAM_TAC1_PULSE   10

access time for highest cas latency

Definition at line 36 of file SdramSpd.h.

#define SPD_SDRAM_TAC2_PULSE   24

access time for 2nd highest cas latency

Definition at line 38 of file SdramSpd.h.

#define SPD_SDRAM_TAC3_PULSE   26

access time for 3rd highest cas latency

Definition at line 40 of file SdramSpd.h.

#define SPD_SDRAM_TCLK1_PULSE   9

cycle time for highest cas latency

Definition at line 35 of file SdramSpd.h.

#define SPD_SDRAM_TCLK2_PULSE   23

cycle time for 2nd highest cas latency

Definition at line 37 of file SdramSpd.h.

#define SPD_SDRAM_TCLK3_PULSE   25

cycle time for 3rd highest cas latency

Definition at line 39 of file SdramSpd.h.

#define SPD_SDRAM_WIDTH   13

Definition at line 28 of file SdramSpd.h.

#define SPD_VAL_DDR2_TYPE   8

DDR2 SDRAM memory.

Definition at line 52 of file SdramSpd.h.

#define SPD_VAL_DDR_TYPE   7

DDR SDRAM memory.

Definition at line 51 of file SdramSpd.h.

#define SPD_VAL_SDR_TYPE   4

SDR SDRAM memory.

Definition at line 50 of file SdramSpd.h.

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