EDK2 doxygen online documents - Firmware Encoding Index 1
EDK2 doxygen online documents - Firmware Encoding Index

S3C24xxPkg/Sec/include/platform/gill.h

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00001 /*
00002  * include/platform/gill.h
00003  *
00004  * This file contains the hardware specific definitions for Gill
00005  *
00006  * Author: Chan Gyun Jeong <cgjeong@mizi.com>
00007  * $Id: gill.h,v 1.1.1.1 2004/02/04 06:22:25 laputa Exp $
00008  *
00009  *
00010  * History
00011  *
00012  * 2002-07-30: Janghoo Lyu <nandy@mizi.com>
00013  */
00014 
00015 #include "config.h"
00016 #include "sa1100.h"
00017 
00018 /*
00019  * Memory map
00020  */
00021 #include "sa1100_gen_memmap.h"
00022 
00023 /*
00024  * Architecture magic and machine type
00025  */
00026 #include "architecture.h"
00027 #define MACH_TYPE               198
00028 #define ARCHITECTURE_MAGIC      ((ARM_PLATFORM << 24) | (ARM_SA1100_CPU << 16) | \
00029                                   MACH_TYPE)
00030 
00031 /*
00032  */
00033 #define DRAM_MDCNFG_ENABLE      MDCNFG_BANK0_ENABLE
00034 #define DRAM_MDCNFG_32MB        (DRAM_MDCNFG_ENABLE | MDCNFG_DTIM0_SDRAM | \
00035                                 MDCNFG_DWID0_32B | MDCNFG_DRAC0(5) | \
00036                                 MDCNFG_TRP0(2) | MDCNFG_TDL0(3) | MDCNFG_TWR0(1))
00037 #define DRAM_MDCNFG             DRAM_MDCNFG_32MB
00038 #define DRAM_CAS0_WAVEFORM0     0xAAAAAA7f
00039 #define DRAM_CAS0_WAVEFORM1     0xAAAAAAAA
00040 #define DRAM_CAS0_WAVEFORM2     0xAAAAAAAA
00041 #define DRAM_MDREFR             (MDREFR_TRASR(1) | MDREFR_DRI(512) | \
00042                                  MDREFR_E1PIN | MDREFR_K1RUN)
00043 #define MSC0_CONFIG     \
00044                 ( ((MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(14) | \
00045                     MSC_RDN(3) | MSC_RRR(2)) << 0 ) /* Bank 0 150ns flash */ | \
00046                   ((MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(7) | MSC_RDN(11) | \
00047                     MSC_RRR(2)) << 16 )  /* Bank 1 150ns flash */ \
00048                 )
00049 #define MSC1_CONFIG \
00050                 ( ((MSC_RT_SRAM_012 | MSC_RBW32 | MSC_RDF(3) | MSC_RDN(4) | \
00051                     MSC_RRR(1)) << 0 )  /* Bank 2 system registers */ | \
00052                   ((MSC_RT_VARLAT_345 | MSC_RBW32 | MSC_RDF(4) | MSC_RDN(2) | \
00053                     MSC_RRR(1)) << 16 )  /* Bank 3 ethernet */ \
00054                 )
00055 #define MSC2_CONFIG \
00056                 ( ((MSC_RT_VARLAT_345 | MSC_RBW32 | MSC_RDF(13) | MSC_RDN(6) | \
00057                     MSC_RRR(3)) << 0 )  /* Bank 4 SA-1111 */ | \
00058                   ((MSC_RT_VARLAT_345 | MSC_RBW32 | MSC_RDF(3) | MSC_RDN(2) | \
00059                     MSC_RRR(2)) << 16 )  /* Bank 5 graphics */ \
00060                 )
00061 #define MECR_CONFIG     0x994a994a
00062 
00063 
00064 
00065 #define UART_BAUD_RATE          115200
00066 
00067 
00068 
00069 #define GILL_BCR_BASE    0x10000000
00070 
00071 #define GILL_BCR        __REG(GILL_BCR_BASE)
00072 
00073 #define GILL_BCR_DB1110 (0x00A07410) /* from the hardhat kernel patches of GILL */
00074 #define GILL_BCR_DB1111 (0x00A074E2) 
00075 
00076 /* Write only external IO */
00077 #define GILL_BCR_IRDA_FSEL   (1<<0)  /* IrDA Frequency select (0 = SIR, 1 = FIR) */
00078 #define GILL_BCR_IRDA_MD0    (1<<1)      /* IrDA control signal */
00079 #define GILL_BCR_IRDA_MD1    (1<<2)      /* IrDA control signal */
00080 #define GILL_BCR_LED_ON      (1<<3)  /* Turn LED on (active low) */
00081 #define GILL_BCR_GSM_BOOT    (1<<4)  /* Boot up GSM module */
00082 #define GILL_BCR_GSM_RESET   (1<<5)  /* Reset GSM module (active low) */
00083 #define GILL_BCR_GSM_CTS     (1<<6)  /* GSM module clear to send (active low) */
00084 #define GILL_BCR_GSM_ON      (1<<7)  /* Turn GSM module on */
00085 #define GILL_BCR_AUDIO_ON    (1<<8)      /* Switch on audio amplifier */
00086 #define GILL_BCR_LIGHT_ON    (1<<9)      /* Switch on LCD light */
00087 #define GILL_BCR_CHARGE_PULSE (1<<10) /* Pulse generator for battery charger */
00088 #define GILL_BCR_LCD_ON      (1<<11) /* LCD power on */
00089 #define GILL_BCR_RS232_ON    (1<<12) /* RS232 enable */
00090 #define GILL_BCR_COM_RTS     (1<<13) /* RS232 request to send (active low) */
00091 #define GILL_BCR_M_RTS       (1<<14) /* Hardware modem request to send (active low) */
00092 #define GILL_BCR_NF_CS       (1<<15) /* NAND Flash chip select (active low) */
00093 #define GILL_BCR_BAT_LVL1    (1<<16) /* Battery level 1 test pin (active low) */
00094 #define GILL_BCR_BAT_LVL2    (1<<17) /* Battery level 2 test pin (active low) */
00095 /* 18 ~ 20 write signal reserved */
00096 #define GILL_BCR_L3_MODE     (1<<21) /* CODEC control enable (active low) */
00097 #define GILL_BCR_L3_SCL      (1<<22) /* CODEC control clock */
00098 #define GILL_BCR_L3_SDA      (1<<23) /* CODEC control data  */
00099 #define GILL_BCR_LIN1_ON     (1<<24) /* Switch on audio line input amplifier */
00100 #define GILL_BCR_LIN2_ON     (1<<25) /* Switch on audio microphone input amplifier */
00101 #define GILL_BCR_BT_RTS      (1<<26) /* Bluetooth request to send (active low) */
00102 #define GILL_BCR_BT_ON       (1<<27) /* Bluetooth on */
00103 #define GILL_BCR_BT_RESET    (1<<28) /* Bluetooth reset (active low) */
00104 #define GILL_BCR_CF_RESET    (1<<29) /* Compact flash card reset */
00105 #define GILL_BCR_CODEC_ON    (1<<30) /* CODEC enable */
00106 #define GILL_BCR_CODEC_RST   (1<<31) /* CODEC reset (active low) */
00107 
00108 
00109 #define GILL_BSR_BASE    GILL_BCR_BASE
00110 #define GILL_BSR        __REG(GILL_BSR_BASE)
00111 
00112 /* Read only external IO */
00113 #define GILL_BSR_IRDA_FSEL   (1<<0)  /* IrDA Frequency select (0 = SIR, 1 = FIR) */
00114 #define GILL_BSR_ADC_BSY     (1<<1)  /* A/D Converter busy */
00115 #define GILL_BSR_NF_BSY      (1<<2)  /* NAND Flash Busy/Ready (active low) */
00116 #define GILL_BSR_BT_CTS      (1<<3)  /* Bluetooth clear to send (active low) */
00117 #define GILL_BSR_GSM_BOOT    (1<<4)  /* Boot up GSM module */
00118 #define GILL_BSR_GSM_RESET   (1<<5)  /* Reset GSM module (active low) */
00119 #define GILL_BSR_GSM_CTS     (1<<6)  /* GSM module clear to send (active low) */
00120 #define GILL_BSR_GSM_ON      (1<<7)  /* Turn GSM module on */
00121 #define GILL_BSR_AUDIO_ON    (1<<8)  /* Switch on audio amplifier */
00122 #define GILL_BSR_DC_JACK_ON  (1<<9)  /* DC jack inserted */
00123 #define GILL_BSR_CHARGE_PULSE (1<<10) /* Pulse generator for battery charger */
00124 #define GILL_BSR_LCD_ON      (1<<11) /* Switch on LCD power */
00125 #define GILL_BSR_RS232_ON    (1<<12) /* RS232 enable */
00126 #define GILL_BSR_COM_RTS     (1<<13) /* RS232 request to send (active low) */
00127 #define GILL_BSR_MMC_CD      (1<<14) /* MMC/SD card detect (active low) */
00128 #define GILL_BSR_MMC_WP      (1<<15) /* MMC/SD card write protect */
00129 #define GILL_BSR_PAGEDN_BT   (1<<16) /* Switch button 3 pressed */
00130 #define GILL_BSR_ENTER_BT    (1<<17) /* Switch button 4 pressed */
00131 #define GILL_BSR_PAGEUP_BT   (1<<18) /* Switch button 5 pressed */
00132 #define GILL_BSR_UP_BT       (1<<19) /* Switch button 6 pressed */
00133 #define GILL_BSR_LEFT_BT     (1<<20) /* Switch button 7 pressed */
00134 #define GILL_BSR_DOWN_BT     (1<<21) /* Switch button 8 pressed */
00135 #define GILL_BSR_RIGHT_BT    (1<<22) /* Switch button 9 pressed */
00136 #define GILL_BSR_ESCAPE_BT   (1<<23) /* Switch button 10 pressed */
00137 #define GILL_BSR_HS_ON       (1<<24) /* Telephone handset on */
00138 #define GILL_BSR_GSM_ANSBUT  (1<<25) /* Telephone answer button pushed */
00139 #define GILL_BSR_GSM_RTS     (1<<26) /* GSM module request to send (active low) */
00140 #define GILL_BSR_GSM_INTR    (1<<27) /* GSM module interrupt triggered (active low) */
00141 #define GILL_BSR_M_CTS       (1<<28) /* Hardware modem clear to send (active low) */
00142 #define GILL_BSR_COM_CTS     (1<<29) /* RS232 clear to send (active low) */
00143 #define GILL_BSR_CF_BSY      (1<<30) /* Compact flash card busy (active low) */
00144 #define GILL_BSR_CF_VS       (1<<31) /* ? (active low) */
00145 
00146 /* GPIOs */
00147 #define GPIO_GPIO(Nb)           (0x00000001 << (Nb))
00148 
00149 #define GILL_GPIO_POWER_BT   GPIO_GPIO (0)  /* I, Power on/off button interrupt */
00150 #define GILL_GPIO_DC_JACK_ON GPIO_GPIO (1)  /* I, DC Jack on (?) */
00151 #define GILL_GPIO_ADC_TXD    GPIO_GPIO (10) /* O, A/D Convertor serial data output */
00152 #define GILL_GPIO_ADC_RXD    GPIO_GPIO (11) /* I, A/D Convertor serial data input */
00153 #define GILL_GPIO_ADC_CLK    GPIO_GPIO (12) /* O, A/D Convertor clock */
00154 #define GILL_GPIO_ADC_FRM    GPIO_GPIO (13) /* O, A/D Convertor frame */
00155 #define GILL_GPIO_BAT_LOW    GPIO_GPIO (14) /* I, Battery low level detected (active low) */
00156 #define GILL_GPIO_SDC_D0     GPIO_GPIO (15) /* I/O, MMC/SD card data 0 */
00157 #define GILL_GPIO_SDC_SCL    GPIO_GPIO (16) /* O, MMC/SD card clock */
00158 #define GILL_GPIO_SDC_SDA    GPIO_GPIO (17) /* I/O, MMC/SD card I2C data */
00159 #define GILL_GPIO_SDC_CS     GPIO_GPIO (18) /* O, MMC/SD card chip select (active low) */
00160 #define GILL_GPIO_FS64       GPIO_GPIO (19) /* I, FS64 clock for CODEC */
00161 #define GILL_GPIO_KEY_IRQ    GPIO_GPIO (20) /* I, Key(SW3-SW10) interrupt */
00162 #define GILL_GPIO_PEN_IRQ    GPIO_GPIO (21) /* I, Touch panel interrupt (active low) */
00163 #define GILL_GPIO_SDC_D1     GPIO_GPIO (22) /* I/O, MMC/SD card data 1 */
00164 #define GILL_GPIO_CF_CD      GPIO_GPIO (23) /* I, CF card detect (active low) */
00165 #define GILL_GPIO_CF_IRQ     GPIO_GPIO (24) /* I, CF card interrupt (active low) */
00166 #define GILL_GPIO_CF_BVD     GPIO_GPIO (25) /* I, CF card battery detect */
00167 #define GILL_GPIO_SDC_D2     GPIO_GPIO (26) /* I/O, MMC/SD card data 2 */
00168 #define GILL_GPIO_RECORD_BT  GPIO_GPIO (27) /* I, Voice Record button interrupt */
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