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EDK2 doxygen online documents - Firmware Encoding Index
Defines

S3C24xxPkg/Sec/include/platform/gill.h File Reference

#include "config.h"
#include "sa1100.h"
#include "sa1100_gen_memmap.h"
#include "architecture.h"

Go to the source code of this file.

Defines

#define MACH_TYPE   198
#define ARCHITECTURE_MAGIC
#define DRAM_MDCNFG_ENABLE   MDCNFG_BANK0_ENABLE
#define DRAM_MDCNFG_32MB
#define DRAM_MDCNFG   DRAM_MDCNFG_32MB
#define DRAM_CAS0_WAVEFORM0   0xAAAAAA7f
#define DRAM_CAS0_WAVEFORM1   0xAAAAAAAA
#define DRAM_CAS0_WAVEFORM2   0xAAAAAAAA
#define DRAM_MDREFR
#define MSC0_CONFIG
#define MSC1_CONFIG
#define MSC2_CONFIG
#define MECR_CONFIG   0x994a994a
#define UART_BAUD_RATE   115200
#define GILL_BCR_BASE   0x10000000
#define GILL_BCR   __REG(GILL_BCR_BASE)
#define GILL_BCR_DB1110   (0x00A07410)
#define GILL_BCR_DB1111   (0x00A074E2)
#define GILL_BCR_IRDA_FSEL   (1<<0)
#define GILL_BCR_IRDA_MD0   (1<<1)
#define GILL_BCR_IRDA_MD1   (1<<2)
#define GILL_BCR_LED_ON   (1<<3)
#define GILL_BCR_GSM_BOOT   (1<<4)
#define GILL_BCR_GSM_RESET   (1<<5)
#define GILL_BCR_GSM_CTS   (1<<6)
#define GILL_BCR_GSM_ON   (1<<7)
#define GILL_BCR_AUDIO_ON   (1<<8)
#define GILL_BCR_LIGHT_ON   (1<<9)
#define GILL_BCR_CHARGE_PULSE   (1<<10)
#define GILL_BCR_LCD_ON   (1<<11)
#define GILL_BCR_RS232_ON   (1<<12)
#define GILL_BCR_COM_RTS   (1<<13)
#define GILL_BCR_M_RTS   (1<<14)
#define GILL_BCR_NF_CS   (1<<15)
#define GILL_BCR_BAT_LVL1   (1<<16)
#define GILL_BCR_BAT_LVL2   (1<<17)
#define GILL_BCR_L3_MODE   (1<<21)
#define GILL_BCR_L3_SCL   (1<<22)
#define GILL_BCR_L3_SDA   (1<<23)
#define GILL_BCR_LIN1_ON   (1<<24)
#define GILL_BCR_LIN2_ON   (1<<25)
#define GILL_BCR_BT_RTS   (1<<26)
#define GILL_BCR_BT_ON   (1<<27)
#define GILL_BCR_BT_RESET   (1<<28)
#define GILL_BCR_CF_RESET   (1<<29)
#define GILL_BCR_CODEC_ON   (1<<30)
#define GILL_BCR_CODEC_RST   (1<<31)
#define GILL_BSR_BASE   GILL_BCR_BASE
#define GILL_BSR   __REG(GILL_BSR_BASE)
#define GILL_BSR_IRDA_FSEL   (1<<0)
#define GILL_BSR_ADC_BSY   (1<<1)
#define GILL_BSR_NF_BSY   (1<<2)
#define GILL_BSR_BT_CTS   (1<<3)
#define GILL_BSR_GSM_BOOT   (1<<4)
#define GILL_BSR_GSM_RESET   (1<<5)
#define GILL_BSR_GSM_CTS   (1<<6)
#define GILL_BSR_GSM_ON   (1<<7)
#define GILL_BSR_AUDIO_ON   (1<<8)
#define GILL_BSR_DC_JACK_ON   (1<<9)
#define GILL_BSR_CHARGE_PULSE   (1<<10)
#define GILL_BSR_LCD_ON   (1<<11)
#define GILL_BSR_RS232_ON   (1<<12)
#define GILL_BSR_COM_RTS   (1<<13)
#define GILL_BSR_MMC_CD   (1<<14)
#define GILL_BSR_MMC_WP   (1<<15)
#define GILL_BSR_PAGEDN_BT   (1<<16)
#define GILL_BSR_ENTER_BT   (1<<17)
#define GILL_BSR_PAGEUP_BT   (1<<18)
#define GILL_BSR_UP_BT   (1<<19)
#define GILL_BSR_LEFT_BT   (1<<20)
#define GILL_BSR_DOWN_BT   (1<<21)
#define GILL_BSR_RIGHT_BT   (1<<22)
#define GILL_BSR_ESCAPE_BT   (1<<23)
#define GILL_BSR_HS_ON   (1<<24)
#define GILL_BSR_GSM_ANSBUT   (1<<25)
#define GILL_BSR_GSM_RTS   (1<<26)
#define GILL_BSR_GSM_INTR   (1<<27)
#define GILL_BSR_M_CTS   (1<<28)
#define GILL_BSR_COM_CTS   (1<<29)
#define GILL_BSR_CF_BSY   (1<<30)
#define GILL_BSR_CF_VS   (1<<31)
#define GPIO_GPIO(Nb)   (0x00000001 << (Nb))
#define GILL_GPIO_POWER_BT   GPIO_GPIO (0)
#define GILL_GPIO_DC_JACK_ON   GPIO_GPIO (1)
#define GILL_GPIO_ADC_TXD   GPIO_GPIO (10)
#define GILL_GPIO_ADC_RXD   GPIO_GPIO (11)
#define GILL_GPIO_ADC_CLK   GPIO_GPIO (12)
#define GILL_GPIO_ADC_FRM   GPIO_GPIO (13)
#define GILL_GPIO_BAT_LOW   GPIO_GPIO (14)
#define GILL_GPIO_SDC_D0   GPIO_GPIO (15)
#define GILL_GPIO_SDC_SCL   GPIO_GPIO (16)
#define GILL_GPIO_SDC_SDA   GPIO_GPIO (17)
#define GILL_GPIO_SDC_CS   GPIO_GPIO (18)
#define GILL_GPIO_FS64   GPIO_GPIO (19)
#define GILL_GPIO_KEY_IRQ   GPIO_GPIO (20)
#define GILL_GPIO_PEN_IRQ   GPIO_GPIO (21)
#define GILL_GPIO_SDC_D1   GPIO_GPIO (22)
#define GILL_GPIO_CF_CD   GPIO_GPIO (23)
#define GILL_GPIO_CF_IRQ   GPIO_GPIO (24)
#define GILL_GPIO_CF_BVD   GPIO_GPIO (25)
#define GILL_GPIO_SDC_D2   GPIO_GPIO (26)
#define GILL_GPIO_RECORD_BT   GPIO_GPIO (27)

Define Documentation

#define ARCHITECTURE_MAGIC
Value:
((ARM_PLATFORM << 24) | (ARM_SA1100_CPU << 16) | \
                                  MACH_TYPE)

Definition at line 28 of file gill.h.

#define DRAM_CAS0_WAVEFORM0   0xAAAAAA7f

Definition at line 38 of file gill.h.

#define DRAM_CAS0_WAVEFORM1   0xAAAAAAAA

Definition at line 39 of file gill.h.

#define DRAM_CAS0_WAVEFORM2   0xAAAAAAAA

Definition at line 40 of file gill.h.

#define DRAM_MDCNFG   DRAM_MDCNFG_32MB

Definition at line 37 of file gill.h.

#define DRAM_MDCNFG_32MB
Value:
(DRAM_MDCNFG_ENABLE | MDCNFG_DTIM0_SDRAM | \
                                MDCNFG_DWID0_32B | MDCNFG_DRAC0(5) | \
                                MDCNFG_TRP0(2) | MDCNFG_TDL0(3) | MDCNFG_TWR0(1))

Definition at line 34 of file gill.h.

#define DRAM_MDCNFG_ENABLE   MDCNFG_BANK0_ENABLE

Definition at line 33 of file gill.h.

#define DRAM_MDREFR
Value:
(MDREFR_TRASR(1) | MDREFR_DRI(512) | \
                                 MDREFR_E1PIN | MDREFR_K1RUN)

Definition at line 41 of file gill.h.

#define GILL_BCR   __REG(GILL_BCR_BASE)

Definition at line 71 of file gill.h.

#define GILL_BCR_AUDIO_ON   (1<<8)

Definition at line 85 of file gill.h.

#define GILL_BCR_BASE   0x10000000

Definition at line 69 of file gill.h.

#define GILL_BCR_BAT_LVL1   (1<<16)

Definition at line 93 of file gill.h.

#define GILL_BCR_BAT_LVL2   (1<<17)

Definition at line 94 of file gill.h.

#define GILL_BCR_BT_ON   (1<<27)

Definition at line 102 of file gill.h.

#define GILL_BCR_BT_RESET   (1<<28)

Definition at line 103 of file gill.h.

#define GILL_BCR_BT_RTS   (1<<26)

Definition at line 101 of file gill.h.

#define GILL_BCR_CF_RESET   (1<<29)

Definition at line 104 of file gill.h.

#define GILL_BCR_CHARGE_PULSE   (1<<10)

Definition at line 87 of file gill.h.

#define GILL_BCR_CODEC_ON   (1<<30)

Definition at line 105 of file gill.h.

#define GILL_BCR_CODEC_RST   (1<<31)

Definition at line 106 of file gill.h.

#define GILL_BCR_COM_RTS   (1<<13)

Definition at line 90 of file gill.h.

#define GILL_BCR_DB1110   (0x00A07410)

Definition at line 73 of file gill.h.

#define GILL_BCR_DB1111   (0x00A074E2)

Definition at line 74 of file gill.h.

#define GILL_BCR_GSM_BOOT   (1<<4)

Definition at line 81 of file gill.h.

#define GILL_BCR_GSM_CTS   (1<<6)

Definition at line 83 of file gill.h.

#define GILL_BCR_GSM_ON   (1<<7)

Definition at line 84 of file gill.h.

#define GILL_BCR_GSM_RESET   (1<<5)

Definition at line 82 of file gill.h.

#define GILL_BCR_IRDA_FSEL   (1<<0)

Definition at line 77 of file gill.h.

#define GILL_BCR_IRDA_MD0   (1<<1)

Definition at line 78 of file gill.h.

#define GILL_BCR_IRDA_MD1   (1<<2)

Definition at line 79 of file gill.h.

#define GILL_BCR_L3_MODE   (1<<21)

Definition at line 96 of file gill.h.

#define GILL_BCR_L3_SCL   (1<<22)

Definition at line 97 of file gill.h.

#define GILL_BCR_L3_SDA   (1<<23)

Definition at line 98 of file gill.h.

#define GILL_BCR_LCD_ON   (1<<11)

Definition at line 88 of file gill.h.

#define GILL_BCR_LED_ON   (1<<3)

Definition at line 80 of file gill.h.

#define GILL_BCR_LIGHT_ON   (1<<9)

Definition at line 86 of file gill.h.

#define GILL_BCR_LIN1_ON   (1<<24)

Definition at line 99 of file gill.h.

#define GILL_BCR_LIN2_ON   (1<<25)

Definition at line 100 of file gill.h.

#define GILL_BCR_M_RTS   (1<<14)

Definition at line 91 of file gill.h.

#define GILL_BCR_NF_CS   (1<<15)

Definition at line 92 of file gill.h.

#define GILL_BCR_RS232_ON   (1<<12)

Definition at line 89 of file gill.h.

#define GILL_BSR   __REG(GILL_BSR_BASE)

Definition at line 110 of file gill.h.

#define GILL_BSR_ADC_BSY   (1<<1)

Definition at line 114 of file gill.h.

#define GILL_BSR_AUDIO_ON   (1<<8)

Definition at line 121 of file gill.h.

#define GILL_BSR_BASE   GILL_BCR_BASE

Definition at line 109 of file gill.h.

#define GILL_BSR_BT_CTS   (1<<3)

Definition at line 116 of file gill.h.

#define GILL_BSR_CF_BSY   (1<<30)

Definition at line 143 of file gill.h.

#define GILL_BSR_CF_VS   (1<<31)

Definition at line 144 of file gill.h.

#define GILL_BSR_CHARGE_PULSE   (1<<10)

Definition at line 123 of file gill.h.

#define GILL_BSR_COM_CTS   (1<<29)

Definition at line 142 of file gill.h.

#define GILL_BSR_COM_RTS   (1<<13)

Definition at line 126 of file gill.h.

#define GILL_BSR_DC_JACK_ON   (1<<9)

Definition at line 122 of file gill.h.

#define GILL_BSR_DOWN_BT   (1<<21)

Definition at line 134 of file gill.h.

#define GILL_BSR_ENTER_BT   (1<<17)

Definition at line 130 of file gill.h.

#define GILL_BSR_ESCAPE_BT   (1<<23)

Definition at line 136 of file gill.h.

#define GILL_BSR_GSM_ANSBUT   (1<<25)

Definition at line 138 of file gill.h.

#define GILL_BSR_GSM_BOOT   (1<<4)

Definition at line 117 of file gill.h.

#define GILL_BSR_GSM_CTS   (1<<6)

Definition at line 119 of file gill.h.

#define GILL_BSR_GSM_INTR   (1<<27)

Definition at line 140 of file gill.h.

#define GILL_BSR_GSM_ON   (1<<7)

Definition at line 120 of file gill.h.

#define GILL_BSR_GSM_RESET   (1<<5)

Definition at line 118 of file gill.h.

#define GILL_BSR_GSM_RTS   (1<<26)

Definition at line 139 of file gill.h.

#define GILL_BSR_HS_ON   (1<<24)

Definition at line 137 of file gill.h.

#define GILL_BSR_IRDA_FSEL   (1<<0)

Definition at line 113 of file gill.h.

#define GILL_BSR_LCD_ON   (1<<11)

Definition at line 124 of file gill.h.

#define GILL_BSR_LEFT_BT   (1<<20)

Definition at line 133 of file gill.h.

#define GILL_BSR_M_CTS   (1<<28)

Definition at line 141 of file gill.h.

#define GILL_BSR_MMC_CD   (1<<14)

Definition at line 127 of file gill.h.

#define GILL_BSR_MMC_WP   (1<<15)

Definition at line 128 of file gill.h.

#define GILL_BSR_NF_BSY   (1<<2)

Definition at line 115 of file gill.h.

#define GILL_BSR_PAGEDN_BT   (1<<16)

Definition at line 129 of file gill.h.

#define GILL_BSR_PAGEUP_BT   (1<<18)

Definition at line 131 of file gill.h.

#define GILL_BSR_RIGHT_BT   (1<<22)

Definition at line 135 of file gill.h.

#define GILL_BSR_RS232_ON   (1<<12)

Definition at line 125 of file gill.h.

#define GILL_BSR_UP_BT   (1<<19)

Definition at line 132 of file gill.h.

#define GILL_GPIO_ADC_CLK   GPIO_GPIO (12)

Definition at line 153 of file gill.h.

#define GILL_GPIO_ADC_FRM   GPIO_GPIO (13)

Definition at line 154 of file gill.h.

#define GILL_GPIO_ADC_RXD   GPIO_GPIO (11)

Definition at line 152 of file gill.h.

#define GILL_GPIO_ADC_TXD   GPIO_GPIO (10)

Definition at line 151 of file gill.h.

#define GILL_GPIO_BAT_LOW   GPIO_GPIO (14)

Definition at line 155 of file gill.h.

#define GILL_GPIO_CF_BVD   GPIO_GPIO (25)

Definition at line 166 of file gill.h.

#define GILL_GPIO_CF_CD   GPIO_GPIO (23)

Definition at line 164 of file gill.h.

#define GILL_GPIO_CF_IRQ   GPIO_GPIO (24)

Definition at line 165 of file gill.h.

#define GILL_GPIO_DC_JACK_ON   GPIO_GPIO (1)

Definition at line 150 of file gill.h.

#define GILL_GPIO_FS64   GPIO_GPIO (19)

Definition at line 160 of file gill.h.

#define GILL_GPIO_KEY_IRQ   GPIO_GPIO (20)

Definition at line 161 of file gill.h.

#define GILL_GPIO_PEN_IRQ   GPIO_GPIO (21)

Definition at line 162 of file gill.h.

#define GILL_GPIO_POWER_BT   GPIO_GPIO (0)

Definition at line 149 of file gill.h.

#define GILL_GPIO_RECORD_BT   GPIO_GPIO (27)

Definition at line 168 of file gill.h.

#define GILL_GPIO_SDC_CS   GPIO_GPIO (18)

Definition at line 159 of file gill.h.

#define GILL_GPIO_SDC_D0   GPIO_GPIO (15)

Definition at line 156 of file gill.h.

#define GILL_GPIO_SDC_D1   GPIO_GPIO (22)

Definition at line 163 of file gill.h.

#define GILL_GPIO_SDC_D2   GPIO_GPIO (26)

Definition at line 167 of file gill.h.

#define GILL_GPIO_SDC_SCL   GPIO_GPIO (16)

Definition at line 157 of file gill.h.

#define GILL_GPIO_SDC_SDA   GPIO_GPIO (17)

Definition at line 158 of file gill.h.

#define GPIO_GPIO (   Nb)    (0x00000001 << (Nb))

Definition at line 147 of file gill.h.

#define MACH_TYPE   198

Definition at line 27 of file gill.h.

#define MECR_CONFIG   0x994a994a

Definition at line 61 of file gill.h.

#define MSC0_CONFIG
Value:
( ((MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(14) | \
                    MSC_RDN(3) | MSC_RRR(2)) << 0 ) /* Bank 0 150ns flash */ | \
                  ((MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(7) | MSC_RDN(11) | \
                    MSC_RRR(2)) << 16 )  /* Bank 1 150ns flash */ \
                )

Definition at line 43 of file gill.h.

#define MSC1_CONFIG
Value:
( ((MSC_RT_SRAM_012 | MSC_RBW32 | MSC_RDF(3) | MSC_RDN(4) | \
                    MSC_RRR(1)) << 0 )  /* Bank 2 system registers */ | \
                  ((MSC_RT_VARLAT_345 | MSC_RBW32 | MSC_RDF(4) | MSC_RDN(2) | \
                    MSC_RRR(1)) << 16 )  /* Bank 3 ethernet */ \
                )

Definition at line 49 of file gill.h.

#define MSC2_CONFIG
Value:
( ((MSC_RT_VARLAT_345 | MSC_RBW32 | MSC_RDF(13) | MSC_RDN(6) | \
                    MSC_RRR(3)) << 0 )  /* Bank 4 SA-1111 */ | \
                  ((MSC_RT_VARLAT_345 | MSC_RBW32 | MSC_RDF(3) | MSC_RDN(2) | \
                    MSC_RRR(2)) << 16 )  /* Bank 5 graphics */ \
                )

Definition at line 55 of file gill.h.

#define UART_BAUD_RATE   115200

Definition at line 65 of file gill.h.

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