EDK2 doxygen online documents - Firmware Encoding Index 1
EDK2 doxygen online documents - Firmware Encoding Index
Functions

MdePkg/Library/BasePciLibCf8/PciLib.c File Reference

#include <Base.h>
#include <Library/PciLib.h>
#include <Library/PciCf8Lib.h>

Go to the source code of this file.

Functions

RETURN_STATUS EFIAPI PciRegisterForRuntimeAccess (IN UINTN Address)
UINT8 EFIAPI PciRead8 (IN UINTN Address)
UINT8 EFIAPI PciWrite8 (IN UINTN Address, IN UINT8 Value)
UINT8 EFIAPI PciOr8 (IN UINTN Address, IN UINT8 OrData)
UINT8 EFIAPI PciAnd8 (IN UINTN Address, IN UINT8 AndData)
UINT8 EFIAPI PciAndThenOr8 (IN UINTN Address, IN UINT8 AndData, IN UINT8 OrData)
UINT8 EFIAPI PciBitFieldRead8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit)
UINT8 EFIAPI PciBitFieldWrite8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 Value)
UINT8 EFIAPI PciBitFieldOr8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 OrData)
UINT8 EFIAPI PciBitFieldAnd8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData)
UINT8 EFIAPI PciBitFieldAndThenOr8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData, IN UINT8 OrData)
UINT16 EFIAPI PciRead16 (IN UINTN Address)
UINT16 EFIAPI PciWrite16 (IN UINTN Address, IN UINT16 Value)
UINT16 EFIAPI PciOr16 (IN UINTN Address, IN UINT16 OrData)
UINT16 EFIAPI PciAnd16 (IN UINTN Address, IN UINT16 AndData)
UINT16 EFIAPI PciAndThenOr16 (IN UINTN Address, IN UINT16 AndData, IN UINT16 OrData)
UINT16 EFIAPI PciBitFieldRead16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit)
UINT16 EFIAPI PciBitFieldWrite16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 Value)
UINT16 EFIAPI PciBitFieldOr16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 OrData)
UINT16 EFIAPI PciBitFieldAnd16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData)
UINT16 EFIAPI PciBitFieldAndThenOr16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData, IN UINT16 OrData)
UINT32 EFIAPI PciRead32 (IN UINTN Address)
UINT32 EFIAPI PciWrite32 (IN UINTN Address, IN UINT32 Value)
UINT32 EFIAPI PciOr32 (IN UINTN Address, IN UINT32 OrData)
UINT32 EFIAPI PciAnd32 (IN UINTN Address, IN UINT32 AndData)
UINT32 EFIAPI PciAndThenOr32 (IN UINTN Address, IN UINT32 AndData, IN UINT32 OrData)
UINT32 EFIAPI PciBitFieldRead32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit)
UINT32 EFIAPI PciBitFieldWrite32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 Value)
UINT32 EFIAPI PciBitFieldOr32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 OrData)
UINT32 EFIAPI PciBitFieldAnd32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData)
UINT32 EFIAPI PciBitFieldAndThenOr32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData, IN UINT32 OrData)
UINTN EFIAPI PciReadBuffer (IN UINTN StartAddress, IN UINTN Size, OUT VOID *Buffer)
UINTN EFIAPI PciWriteBuffer (IN UINTN StartAddress, IN UINTN Size, IN VOID *Buffer)

Detailed Description

PCI Library functions that use I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles. Layers on top of one PCI CF8 Library instance.

Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at http://opensource.org/licenses/bsd-license.php.

THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

Definition in file PciLib.c.


Function Documentation

UINT16 EFIAPI PciAnd16 ( IN UINTN  Address,
IN UINT16  AndData 
)

Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value.

Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
AndDataThe value to AND with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 486 of file PciLib.c.

UINT32 EFIAPI PciAnd32 ( IN UINTN  Address,
IN UINT32  AndData 
)

Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value.

Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
AndDataThe value to AND with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 824 of file PciLib.c.

UINT8 EFIAPI PciAnd8 ( IN UINTN  Address,
IN UINT8  AndData 
)

Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value.

Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
AndDataThe value to AND with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 154 of file PciLib.c.

UINT16 EFIAPI PciAndThenOr16 ( IN UINTN  Address,
IN UINT16  AndData,
IN UINT16  OrData 
)

Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value, followed a bitwise OR with another 16-bit value.

Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
AndDataThe value to AND with the PCI configuration register.
OrDataThe value to OR with the result of the AND operation.
Returns:
The value written back to the PCI configuration register.

Definition at line 519 of file PciLib.c.

UINT32 EFIAPI PciAndThenOr32 ( IN UINTN  Address,
IN UINT32  AndData,
IN UINT32  OrData 
)

Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value, followed a bitwise OR with another 32-bit value.

Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
AndDataThe value to AND with the PCI configuration register.
OrDataThe value to OR with the result of the AND operation.
Returns:
The value written back to the PCI configuration register.

Definition at line 857 of file PciLib.c.

UINT8 EFIAPI PciAndThenOr8 ( IN UINTN  Address,
IN UINT8  AndData,
IN UINT8  OrData 
)

Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value, followed a bitwise OR with another 8-bit value.

Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
AndDataThe value to AND with the PCI configuration register.
OrDataThe value to OR with the result of the AND operation.
Returns:
The value written back to the PCI configuration register.

Definition at line 186 of file PciLib.c.

UINT16 EFIAPI PciBitFieldAnd16 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT16  AndData 
)

Reads a bit field in a 16-bit PCI configuration register, performs a bitwise AND, and writes the result back to the bit field in the 16-bit register.

Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in AndData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..15.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..15.
AndDataThe value to AND with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 665 of file PciLib.c.

UINT32 EFIAPI PciBitFieldAnd32 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT32  AndData 
)

Reads a bit field in a 32-bit PCI configuration register, performs a bitwise AND, and writes the result back to the bit field in the 32-bit register.

Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in AndData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..31.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..31.
AndDataThe value to AND with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 1003 of file PciLib.c.

UINT8 EFIAPI PciBitFieldAnd8 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT8  AndData 
)

Reads a bit field in an 8-bit PCI configuration register, performs a bitwise AND, and writes the result back to the bit field in the 8-bit register.

Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in AndData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..7.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..7.
AndDataThe value to AND with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 328 of file PciLib.c.

UINT16 EFIAPI PciBitFieldAndThenOr16 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT16  AndData,
IN UINT16  OrData 
)

Reads a bit field in a 16-bit port, performs a bitwise AND followed by a bitwise OR, and writes the result back to the bit field in the 16-bit port.

Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in both AndData and OrData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..15.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..15.
AndDataThe value to AND with the PCI configuration register.
OrDataThe value to OR with the result of the AND operation.
Returns:
The value written back to the PCI configuration register.

Definition at line 707 of file PciLib.c.

UINT32 EFIAPI PciBitFieldAndThenOr32 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT32  AndData,
IN UINT32  OrData 
)

Reads a bit field in a 32-bit port, performs a bitwise AND followed by a bitwise OR, and writes the result back to the bit field in the 32-bit port.

Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in both AndData and OrData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..31.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..31.
AndDataThe value to AND with the PCI configuration register.
OrDataThe value to OR with the result of the AND operation.
Returns:
The value written back to the PCI configuration register.

Definition at line 1045 of file PciLib.c.

UINT8 EFIAPI PciBitFieldAndThenOr8 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT8  AndData,
IN UINT8  OrData 
)

Reads a bit field in an 8-bit port, performs a bitwise AND followed by a bitwise OR, and writes the result back to the bit field in the 8-bit port.

Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in both AndData and OrData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..7.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..7.
AndDataThe value to AND with the PCI configuration register.
OrDataThe value to OR with the result of the AND operation.
Returns:
The value written back to the PCI configuration register.

Definition at line 369 of file PciLib.c.

UINT16 EFIAPI PciBitFieldOr16 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT16  OrData 
)

Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and writes the result back to the bit field in the 16-bit port.

Reads the 16-bit PCI configuration register specified by Address, performs a bitwise OR between the read result and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in OrData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..15.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..15.
OrDataThe value to OR with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 626 of file PciLib.c.

UINT32 EFIAPI PciBitFieldOr32 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT32  OrData 
)

Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and writes the result back to the bit field in the 32-bit port.

Reads the 32-bit PCI configuration register specified by Address, performs a bitwise OR between the read result and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in OrData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..31.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..31.
OrDataThe value to OR with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 964 of file PciLib.c.

UINT8 EFIAPI PciBitFieldOr8 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT8  OrData 
)

Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and writes the result back to the bit field in the 8-bit port.

Reads the 8-bit PCI configuration register specified by Address, performs a bitwise OR between the read result and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in OrData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..7.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..7.
OrDataThe value to OR with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 290 of file PciLib.c.

UINT16 EFIAPI PciBitFieldRead16 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit 
)

Reads a bit field of a PCI configuration register.

Reads the bit field in a 16-bit PCI configuration register. The bit field is specified by the StartBit and the EndBit. The value of the bit field is returned.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to read.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..15.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..15.
Returns:
The value of the bit field read from the PCI configuration register.

Definition at line 552 of file PciLib.c.

UINT32 EFIAPI PciBitFieldRead32 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit 
)

Reads a bit field of a PCI configuration register.

Reads the bit field in a 32-bit PCI configuration register. The bit field is specified by the StartBit and the EndBit. The value of the bit field is returned.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to read.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..31.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..31.
Returns:
The value of the bit field read from the PCI configuration register.

Definition at line 890 of file PciLib.c.

UINT8 EFIAPI PciBitFieldRead8 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit 
)

Reads a bit field of a PCI configuration register.

Reads the bit field in an 8-bit PCI configuration register. The bit field is specified by the StartBit and the EndBit. The value of the bit field is returned.

If Address > 0x0FFFFFFF, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to read.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..7.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..7.
Returns:
The value of the bit field read from the PCI configuration register.

Definition at line 218 of file PciLib.c.

UINT16 EFIAPI PciBitFieldWrite16 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT16  Value 
)

Writes a bit field to a PCI configuration register.

Writes Value to the bit field of the PCI configuration register. The bit field is specified by the StartBit and the EndBit. All other bits in the destination PCI configuration register are preserved. The new value of the 16-bit register is returned.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..15.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..15.
ValueThe new value of the bit field.
Returns:
The value written back to the PCI configuration register.

Definition at line 587 of file PciLib.c.

UINT32 EFIAPI PciBitFieldWrite32 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT32  Value 
)

Writes a bit field to a PCI configuration register.

Writes Value to the bit field of the PCI configuration register. The bit field is specified by the StartBit and the EndBit. All other bits in the destination PCI configuration register are preserved. The new value of the 32-bit register is returned.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..31.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..31.
ValueThe new value of the bit field.
Returns:
The value written back to the PCI configuration register.

Definition at line 925 of file PciLib.c.

UINT8 EFIAPI PciBitFieldWrite8 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT8  Value 
)

Writes a bit field to a PCI configuration register.

Writes Value to the bit field of the PCI configuration register. The bit field is specified by the StartBit and the EndBit. All other bits in the destination PCI configuration register are preserved. The new value of the 8-bit register is returned.

If Address > 0x0FFFFFFF, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressThe PCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..7.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..7.
ValueThe new value of the bit field.
Returns:
The value written back to the PCI configuration register.

Definition at line 252 of file PciLib.c.

UINT16 EFIAPI PciOr16 ( IN UINTN  Address,
IN UINT16  OrData 
)

Performs a bitwise OR of a 16-bit PCI configuration register with a 16-bit value.

Reads the 16-bit PCI configuration register specified by Address, performs a bitwise OR between the read result and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
OrDataThe value to OR with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 455 of file PciLib.c.

UINT32 EFIAPI PciOr32 ( IN UINTN  Address,
IN UINT32  OrData 
)

Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value.

Reads the 32-bit PCI configuration register specified by Address, performs a bitwise OR between the read result and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
OrDataThe value to OR with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 793 of file PciLib.c.

UINT8 EFIAPI PciOr8 ( IN UINTN  Address,
IN UINT8  OrData 
)

Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value.

Reads the 8-bit PCI configuration register specified by Address, performs a bitwise OR between the read result and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
OrDataThe value to OR with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 124 of file PciLib.c.

UINT16 EFIAPI PciRead16 ( IN UINTN  Address)

Reads a 16-bit PCI configuration register.

Reads and returns the 16-bit PCI configuration register specified by Address. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
Returns:
The read value from the PCI configuration register.

Definition at line 398 of file PciLib.c.

UINT32 EFIAPI PciRead32 ( IN UINTN  Address)

Reads a 32-bit PCI configuration register.

Reads and returns the 32-bit PCI configuration register specified by Address. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
Returns:
The read value from the PCI configuration register.

Definition at line 736 of file PciLib.c.

UINT8 EFIAPI PciRead8 ( IN UINTN  Address)

Reads an 8-bit PCI configuration register.

Reads and returns the 8-bit PCI configuration register specified by Address. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
Returns:
The read value from the PCI configuration register.

Definition at line 69 of file PciLib.c.

UINTN EFIAPI PciReadBuffer ( IN UINTN  StartAddress,
IN UINTN  Size,
OUT VOID *  Buffer 
)

Reads a range of PCI configuration registers into a caller supplied buffer.

Reads the range of PCI configuration registers specified by StartAddress and Size into the buffer specified by Buffer. This function only allows the PCI configuration registers from a single PCI function to be read. Size is returned. When possible 32-bit PCI configuration read cycles are used to read from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit and 16-bit PCI configuration read cycles may be used at the beginning and the end of the range.

If StartAddress > 0x0FFFFFFF, then ASSERT(). If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT().

Parameters:
StartAddressThe starting address that encodes the PCI Bus, Device, Function and Register.
SizeThe size in bytes of the transfer.
BufferThe pointer to a buffer receiving the data read.
Returns:
Size

Definition at line 1081 of file PciLib.c.

RETURN_STATUS EFIAPI PciRegisterForRuntimeAccess ( IN UINTN  Address)

Registers a PCI device so PCI configuration registers may be accessed after SetVirtualAddressMap().

Registers the PCI device specified by Address so all the PCI configuration registers associated with that PCI device may be accessed after SetVirtualAddressMap() is called.

If Address > 0x0FFFFFFF, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
Return values:
RETURN_SUCCESSThe PCI device was registered for runtime access.
RETURN_UNSUPPORTEDAn attempt was made to call this function after ExitBootServices().
RETURN_UNSUPPORTEDThe resources required to access the PCI device at runtime could not be mapped.
RETURN_OUT_OF_RESOURCESThere are not enough resources available to complete the registration.

Definition at line 45 of file PciLib.c.

UINT16 EFIAPI PciWrite16 ( IN UINTN  Address,
IN UINT16  Value 
)

Writes a 16-bit PCI configuration register.

Writes the 16-bit PCI configuration register specified by Address with the value specified by Value. Value is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
ValueThe value to write.
Returns:
The value written to the PCI configuration register.

Definition at line 424 of file PciLib.c.

UINT32 EFIAPI PciWrite32 ( IN UINTN  Address,
IN UINT32  Value 
)

Writes a 32-bit PCI configuration register.

Writes the 32-bit PCI configuration register specified by Address with the value specified by Value. Value is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
ValueThe value to write.
Returns:
The value written to the PCI configuration register.

Definition at line 762 of file PciLib.c.

UINT8 EFIAPI PciWrite8 ( IN UINTN  Address,
IN UINT8  Value 
)

Writes an 8-bit PCI configuration register.

Writes the 8-bit PCI configuration register specified by Address with the value specified by Value. Value is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT().

Parameters:
AddressThe address that encodes the PCI Bus, Device, Function and Register.
ValueThe value to write.
Returns:
The value written to the PCI configuration register.

Definition at line 94 of file PciLib.c.

UINTN EFIAPI PciWriteBuffer ( IN UINTN  StartAddress,
IN UINTN  Size,
IN VOID *  Buffer 
)

Copies the data in a caller supplied buffer to a specified range of PCI configuration space.

Writes the range of PCI configuration registers specified by StartAddress and Size from the buffer specified by Buffer. This function only allows the PCI configuration registers from a single PCI function to be written. Size is returned. When possible 32-bit PCI configuration write cycles are used to write from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit and 16-bit PCI configuration write cycles may be used at the beginning and the end of the range.

If StartAddress > 0x0FFFFFFF, then ASSERT(). If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT().

Parameters:
StartAddressThe starting address that encodes the PCI Bus, Device, Function and Register.
SizeThe size in bytes of the transfer.
BufferThe pointer to a buffer containing the data to write.
Returns:
Size written to StartAddress.

Definition at line 1116 of file PciLib.c.

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