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Defines | Functions

EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BasePciCf8Lib/PciLib.c File Reference

#include "EdkIIGlueBase.h"

Go to the source code of this file.

Defines

#define PCI_CONFIGURATION_ADDRESS_PORT   0xCF8
#define PCI_CONFIGURATION_DATA_PORT   0xCFC
#define ASSERT_INVALID_PCI_ADDRESS(A, M)   ASSERT (((A) & (~0xffff0ff | (M))) == 0)
#define PCI_TO_CF8_ADDRESS(A)   ((UINT32) ((((A) >> 4) & 0x00ffff00) | ((A) & 0xfc) | 0x80000000))

Functions

UINT8 EFIAPI PciCf8Read8 (IN UINTN Address)
UINT8 EFIAPI PciCf8Write8 (IN UINTN Address, IN UINT8 Value)
UINT8 EFIAPI PciCf8Or8 (IN UINTN Address, IN UINT8 OrData)
UINT8 EFIAPI PciCf8And8 (IN UINTN Address, IN UINT8 AndData)
UINT8 EFIAPI PciCf8AndThenOr8 (IN UINTN Address, IN UINT8 AndData, IN UINT8 OrData)
UINT8 EFIAPI PciCf8BitFieldRead8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit)
UINT8 EFIAPI PciCf8BitFieldWrite8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 Value)
UINT8 EFIAPI PciCf8BitFieldOr8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 OrData)
UINT8 EFIAPI PciCf8BitFieldAnd8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData)
UINT8 EFIAPI PciCf8BitFieldAndThenOr8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData, IN UINT8 OrData)
UINT16 EFIAPI PciCf8Read16 (IN UINTN Address)
UINT16 EFIAPI PciCf8Write16 (IN UINTN Address, IN UINT16 Value)
UINT16 EFIAPI PciCf8Or16 (IN UINTN Address, IN UINT16 OrData)
UINT16 EFIAPI PciCf8And16 (IN UINTN Address, IN UINT16 AndData)
UINT16 EFIAPI PciCf8AndThenOr16 (IN UINTN Address, IN UINT16 AndData, IN UINT16 OrData)
UINT16 EFIAPI PciCf8BitFieldRead16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit)
UINT16 EFIAPI PciCf8BitFieldWrite16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 Value)
UINT16 EFIAPI PciCf8BitFieldOr16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 OrData)
UINT16 EFIAPI PciCf8BitFieldAnd16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData)
UINT16 EFIAPI PciCf8BitFieldAndThenOr16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData, IN UINT16 OrData)
UINT32 EFIAPI PciCf8Read32 (IN UINTN Address)
UINT32 EFIAPI PciCf8Write32 (IN UINTN Address, IN UINT32 Value)
UINT32 EFIAPI PciCf8Or32 (IN UINTN Address, IN UINT32 OrData)
UINT32 EFIAPI PciCf8And32 (IN UINTN Address, IN UINT32 AndData)
UINT32 EFIAPI PciCf8AndThenOr32 (IN UINTN Address, IN UINT32 AndData, IN UINT32 OrData)
UINT32 EFIAPI PciCf8BitFieldRead32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit)
UINT32 EFIAPI PciCf8BitFieldWrite32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 Value)
UINT32 EFIAPI PciCf8BitFieldOr32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 OrData)
UINT32 EFIAPI PciCf8BitFieldAnd32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData)
UINT32 EFIAPI PciCf8BitFieldAndThenOr32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData, IN UINT32 OrData)
UINTN EFIAPI PciCf8ReadBuffer (IN UINTN StartAddress, IN UINTN Size, OUT VOID *Buffer)
UINTN EFIAPI PciCf8WriteBuffer (IN UINTN StartAddress, IN UINTN Size, IN VOID *Buffer)

Define Documentation

#define ASSERT_INVALID_PCI_ADDRESS (   A,
 
)    ASSERT (((A) & (~0xffff0ff | (M))) == 0)

Assert the validity of a PCI address. A valid PCI address should contain 1's only in the low 28 bits.

Parameters:
AThe address to validate.
MAdditional bits to assert to be zero.

Definition at line 51 of file PciLib.c.

#define PCI_CONFIGURATION_ADDRESS_PORT   0xCF8

Definition at line 27 of file PciLib.c.

#define PCI_CONFIGURATION_DATA_PORT   0xCFC

Definition at line 28 of file PciLib.c.

#define PCI_TO_CF8_ADDRESS (   A)    ((UINT32) ((((A) >> 4) & 0x00ffff00) | ((A) & 0xfc) | 0x80000000))

Convert a PCI Express address to PCI CF8 address.

Parameters:
AThe address to convert.
Return values:
Thecoverted address.

Definition at line 62 of file PciLib.c.


Function Documentation

UINT16 EFIAPI PciCf8And16 ( IN UINTN  Address,
IN UINT16  AndData 
)

Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value.

Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
AndDataThe value to AND with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 583 of file PciLib.c.

UINT32 EFIAPI PciCf8And32 ( IN UINTN  Address,
IN UINT32  AndData 
)

Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value.

Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
AndDataThe value to AND with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 989 of file PciLib.c.

UINT8 EFIAPI PciCf8And8 ( IN UINTN  Address,
IN UINT8  AndData 
)

Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value.

Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
AndDataThe value to AND with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 183 of file PciLib.c.

UINT16 EFIAPI PciCf8AndThenOr16 ( IN UINTN  Address,
IN UINT16  AndData,
IN UINT16  OrData 
)

Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value, followed a bitwise inclusive OR with another 16-bit value.

Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
AndDataThe value to AND with the PCI configuration register.
OrDataThe value to OR with the result of the AND operation.
Returns:
The value written back to the PCI configuration register.

Definition at line 622 of file PciLib.c.

UINT32 EFIAPI PciCf8AndThenOr32 ( IN UINTN  Address,
IN UINT32  AndData,
IN UINT32  OrData 
)

Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value, followed a bitwise inclusive OR with another 32-bit value.

Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
AndDataThe value to AND with the PCI configuration register.
OrDataThe value to OR with the result of the AND operation.
Returns:
The value written back to the PCI configuration register.

Definition at line 1028 of file PciLib.c.

UINT8 EFIAPI PciCf8AndThenOr8 ( IN UINTN  Address,
IN UINT8  AndData,
IN UINT8  OrData 
)

Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value, followed a bitwise inclusive OR with another 8-bit value.

Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
AndDataThe value to AND with the PCI configuration register.
OrDataThe value to OR with the result of the AND operation.
Returns:
The value written back to the PCI configuration register.

Definition at line 221 of file PciLib.c.

UINT16 EFIAPI PciCf8BitFieldAnd16 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT16  AndData 
)

Reads a bit field in a 16-bit PCI configuration register, performs a bitwise AND, and writes the result back to the bit field in the 16-bit register.

Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in AndData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..15.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..15.
AndDataThe value to AND with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 798 of file PciLib.c.

UINT32 EFIAPI PciCf8BitFieldAnd32 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT32  AndData 
)

Reads a bit field in a 32-bit PCI configuration register, performs a bitwise AND, and writes the result back to the bit field in the 32-bit register.

Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in AndData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..31.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..31.
AndDataThe value to AND with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 1204 of file PciLib.c.

UINT8 EFIAPI PciCf8BitFieldAnd8 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT8  AndData 
)

Reads a bit field in an 8-bit PCI configuration register, performs a bitwise AND, and writes the result back to the bit field in the 8-bit register.

Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in AndData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..7.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..7.
AndDataThe value to AND with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 393 of file PciLib.c.

UINT16 EFIAPI PciCf8BitFieldAndThenOr16 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT16  AndData,
IN UINT16  OrData 
)

Reads a bit field in a 16-bit port, performs a bitwise AND followed by a bitwise inclusive OR, and writes the result back to the bit field in the 16-bit port.

Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND followed by a bitwise inclusive OR between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in both AndData and OrData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..15.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..15.
AndDataThe value to AND with the PCI configuration register.
OrDataThe value to OR with the result of the AND operation.
Returns:
The value written back to the PCI configuration register.

Definition at line 848 of file PciLib.c.

UINT32 EFIAPI PciCf8BitFieldAndThenOr32 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT32  AndData,
IN UINT32  OrData 
)

Reads a bit field in a 32-bit port, performs a bitwise AND followed by a bitwise inclusive OR, and writes the result back to the bit field in the 32-bit port.

Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND followed by a bitwise inclusive OR between the read result and the value specified by AndData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in both AndData and OrData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..31.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..31.
AndDataThe value to AND with the PCI configuration register.
OrDataThe value to OR with the result of the AND operation.
Returns:
The value written back to the PCI configuration register.

Definition at line 1254 of file PciLib.c.

UINT8 EFIAPI PciCf8BitFieldAndThenOr8 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT8  AndData,
IN UINT8  OrData 
)

Reads a bit field in an 8-bit port, performs a bitwise AND followed by a bitwise inclusive OR, and writes the result back to the bit field in the 8-bit port.

Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND followed by a bitwise inclusive OR between the read result and the value specified by AndData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in both AndData and OrData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..7.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..7.
AndDataThe value to AND with the PCI configuration register.
OrDataThe value to OR with the result of the AND operation.
Returns:
The value written back to the PCI configuration register.

Definition at line 442 of file PciLib.c.

UINT16 EFIAPI PciCf8BitFieldOr16 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT16  OrData 
)

Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and writes the result back to the bit field in the 16-bit port.

Reads the 16-bit PCI configuration register specified by Address, performs a bitwise inclusive OR between the read result and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in OrData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..15.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..15.
OrDataThe value to OR with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 751 of file PciLib.c.

UINT32 EFIAPI PciCf8BitFieldOr32 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT32  OrData 
)

Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and writes the result back to the bit field in the 32-bit port.

Reads the 32-bit PCI configuration register specified by Address, performs a bitwise inclusive OR between the read result and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in OrData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..31.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..31.
OrDataThe value to OR with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 1157 of file PciLib.c.

UINT8 EFIAPI PciCf8BitFieldOr8 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT8  OrData 
)

Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and writes the result back to the bit field in the 8-bit port.

Reads the 8-bit PCI configuration register specified by Address, performs a bitwise inclusive OR between the read result and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in OrData are stripped.

If Address > 0x0FFFFFFF, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..7.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..7.
OrDataThe value to OR with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 347 of file PciLib.c.

UINT16 EFIAPI PciCf8BitFieldRead16 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit 
)

Reads a bit field of a PCI configuration register.

Reads the bit field in a 16-bit PCI configuration register. The bit field is specified by the StartBit and the EndBit. The value of the bit field is returned.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to read.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..15.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..15.
Returns:
The value of the bit field read from the PCI configuration register.

Definition at line 662 of file PciLib.c.

UINT32 EFIAPI PciCf8BitFieldRead32 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit 
)

Reads a bit field of a PCI configuration register.

Reads the bit field in a 32-bit PCI configuration register. The bit field is specified by the StartBit and the EndBit. The value of the bit field is returned.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to read.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..31.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..31.
Returns:
The value of the bit field read from the PCI configuration register.

Definition at line 1068 of file PciLib.c.

UINT8 EFIAPI PciCf8BitFieldRead8 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit 
)

Reads a bit field of a PCI configuration register.

Reads the bit field in an 8-bit PCI configuration register. The bit field is specified by the StartBit and the EndBit. The value of the bit field is returned.

If Address > 0x0FFFFFFF, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to read.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..7.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..7.
Returns:
The value of the bit field read from the PCI configuration register.

Definition at line 260 of file PciLib.c.

UINT16 EFIAPI PciCf8BitFieldWrite16 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT16  Value 
)

Writes a bit field to a PCI configuration register.

Writes Value to the bit field of the PCI configuration register. The bit field is specified by the StartBit and the EndBit. All other bits in the destination PCI configuration register are preserved. The new value of the 16-bit register is returned.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..15.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..15.
ValueNew value of the bit field.
Returns:
The value written back to the PCI configuration register.

Definition at line 704 of file PciLib.c.

UINT32 EFIAPI PciCf8BitFieldWrite32 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT32  Value 
)

Writes a bit field to a PCI configuration register.

Writes Value to the bit field of the PCI configuration register. The bit field is specified by the StartBit and the EndBit. All other bits in the destination PCI configuration register are preserved. The new value of the 32-bit register is returned.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..31.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..31.
ValueNew value of the bit field.
Returns:
The value written back to the PCI configuration register.

Definition at line 1110 of file PciLib.c.

UINT8 EFIAPI PciCf8BitFieldWrite8 ( IN UINTN  Address,
IN UINTN  StartBit,
IN UINTN  EndBit,
IN UINT8  Value 
)

Writes a bit field to a PCI configuration register.

Writes Value to the bit field of the PCI configuration register. The bit field is specified by the StartBit and the EndBit. All other bits in the destination PCI configuration register are preserved. The new value of the 8-bit register is returned.

If Address > 0x0FFFFFFF, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT().

Parameters:
AddressPCI configuration register to write.
StartBitThe ordinal of the least significant bit in the bit field. Range 0..7.
EndBitThe ordinal of the most significant bit in the bit field. Range 0..7.
ValueNew value of the bit field.
Returns:
The value written back to the PCI configuration register.

Definition at line 301 of file PciLib.c.

UINT16 EFIAPI PciCf8Or16 ( IN UINTN  Address,
IN UINT16  OrData 
)

Performs a bitwise inclusive OR of a 16-bit PCI configuration register with a 16-bit value.

Reads the 16-bit PCI configuration register specified by Address, performs a bitwise inclusive OR between the read result and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
OrDataThe value to OR with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 546 of file PciLib.c.

UINT32 EFIAPI PciCf8Or32 ( IN UINTN  Address,
IN UINT32  OrData 
)

Performs a bitwise inclusive OR of a 32-bit PCI configuration register with a 32-bit value.

Reads the 32-bit PCI configuration register specified by Address, performs a bitwise inclusive OR between the read result and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
OrDataThe value to OR with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 952 of file PciLib.c.

UINT8 EFIAPI PciCf8Or8 ( IN UINTN  Address,
IN UINT8  OrData 
)

Performs a bitwise inclusive OR of an 8-bit PCI configuration register with an 8-bit value.

Reads the 8-bit PCI configuration register specified by Address, performs a bitwise inclusive OR between the read result and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
OrDataThe value to OR with the PCI configuration register.
Returns:
The value written back to the PCI configuration register.

Definition at line 147 of file PciLib.c.

UINT16 EFIAPI PciCf8Read16 ( IN UINTN  Address)

Reads a 16-bit PCI configuration register.

Reads and returns the 16-bit PCI configuration register specified by Address. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
Returns:
The read value from the PCI configuration register.

Definition at line 480 of file PciLib.c.

UINT32 EFIAPI PciCf8Read32 ( IN UINTN  Address)

Reads a 32-bit PCI configuration register.

Reads and returns the 32-bit PCI configuration register specified by Address. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
Returns:
The read value from the PCI configuration register.

Definition at line 886 of file PciLib.c.

UINT8 EFIAPI PciCf8Read8 ( IN UINTN  Address)

Reads an 8-bit PCI configuration register.

Reads and returns the 8-bit PCI configuration register specified by Address. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
Returns:
The read value from the PCI configuration register.

Definition at line 83 of file PciLib.c.

UINTN EFIAPI PciCf8ReadBuffer ( IN UINTN  StartAddress,
IN UINTN  Size,
OUT VOID *  Buffer 
)

Reads a range of PCI configuration registers into a caller supplied buffer.

Reads the range of PCI configuration registers specified by StartAddress and Size into the buffer specified by Buffer. This function only allows the PCI configuration registers from a single PCI function to be read. Size is returned. When possible 32-bit PCI configuration read cycles are used to read from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit and 16-bit PCI configuration read cycles may be used at the beginning and the end of the range.

If StartAddress > 0x0FFFFFFF, then ASSERT(). If the register specified by StartAddress >= 0x100, then ASSERT(). If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT().

Parameters:
StartAddressStarting address that encodes the PCI Bus, Device, Function and Register.
SizeSize in bytes of the transfer.
BufferPointer to a buffer receiving the data read.
Returns:
Size

Definition at line 1299 of file PciLib.c.

UINT16 EFIAPI PciCf8Write16 ( IN UINTN  Address,
IN UINT16  Value 
)

Writes a 16-bit PCI configuration register.

Writes the 16-bit PCI configuration register specified by Address with the value specified by Value. Value is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
ValueThe value to write.
Returns:
The value written to the PCI configuration register.

Definition at line 509 of file PciLib.c.

UINT32 EFIAPI PciCf8Write32 ( IN UINTN  Address,
IN UINT32  Value 
)

Writes a 32-bit PCI configuration register.

Writes the 32-bit PCI configuration register specified by Address with the value specified by Value. Value is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
ValueThe value to write.
Returns:
The value written to the PCI configuration register.

Definition at line 915 of file PciLib.c.

UINT8 EFIAPI PciCf8Write8 ( IN UINTN  Address,
IN UINT8  Value 
)

Writes an 8-bit PCI configuration register.

Writes the 8-bit PCI configuration register specified by Address with the value specified by Value. Value is returned. This function must guarantee that all PCI read and write operations are serialized.

If Address > 0x0FFFFFFF, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT().

Parameters:
AddressAddress that encodes the PCI Bus, Device, Function and Register.
ValueThe value to write.
Returns:
The value written to the PCI configuration register.

Definition at line 111 of file PciLib.c.

UINTN EFIAPI PciCf8WriteBuffer ( IN UINTN  StartAddress,
IN UINTN  Size,
IN VOID *  Buffer 
)

Copies the data in a caller supplied buffer to a specified range of PCI configuration space.

Writes the range of PCI configuration registers specified by StartAddress and Size from the buffer specified by Buffer. This function only allows the PCI configuration registers from a single PCI function to be written. Size is returned. When possible 32-bit PCI configuration write cycles are used to write from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit and 16-bit PCI configuration write cycles may be used at the beginning and the end of the range.

If StartAddress > 0x0FFFFFFF, then ASSERT(). If the register specified by StartAddress >= 0x100, then ASSERT(). If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT().

Parameters:
StartAddressStarting address that encodes the PCI Bus, Device, Function and Register.
SizeSize in bytes of the transfer.
BufferPointer to a buffer containing the data to write.
Returns:
Size

Definition at line 1398 of file PciLib.c.

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